A semiconductor design group was in need of PDS’ support for the design of a new windshield wiper controller. This controller would be used in the new models of one of the big three American automakers. The semiconductor group had no prior experience using VHDL or Verilog, nor knowledge of how to integrate such a technology into their ASIC design flow, as prior ASICs were mainly analog in nature. ProDigiSys worked with the customer to select EDA point tools to augment their existing CAD flow.
Once the design flow was built and tested, our focus turned to designing the wiper controller. A specification for the wiper controller was provided, written for an implementation of the logic in a Microchip micro-controller. To help ensure first-time success of the ASIC, PDS recommended prototyping the VHDL design using a Xilinx Spartan device that could then be tested in a lab with the actual wiper controller motor. Once specification compliance was verified, the design team retargeted the design for an XFAB ASIC technology that supported flash memory.
“PDS’ leadership and digital design experience guided the customer to grow the capabilities of their ASIC design center to include digital ASICs using a modern HDL design entry methodology.
The flash memory would be used to store values in a lookup table, to determine the speed of the wiper based on the automobile’s velocity. Instead of implementing a computational algorithm for calculating the wiper arm speed, the decision was made to use pre-computed values. These values would be recalled in real-time. This approach saved precious die area, and reduced the overall cost by several pennies per unit – viewed by our customer as quite a savings in the automotive industry.
Through the use of FPGA prototyping and ProDigiSys’ vast experience with implementing digital design methodologies using VHDL the project was a success. The chips were delivered to the first-tier automotive supplier in time to be used in the next year’s new automobile models.
- On behalf of Trenton’s STEMcivics Charter School FRC Robotics Team
- Vivado Asynchronous Clocking Group Constraint
- Enable DIFF_TERM for LVDS in Vivado’s PlanAhead
- New System Design Succeeds First Time – Despite Challenging Requirements
- First-Time Success with ASIC Prototype of Automotive Wiper Controller